To increase the memory capacity of a nonvolatile semiconductor memory device, a method for forming three-dimensional memory cells can be considered. In this method, memory holes are formed in a stacked body in which control electrodes are stacked. A memory film is provided on the sidewall of this memory hole. Furthermore, a channel body layer is provided on the sidewall of this memory film. A plurality of such memory cells can be placed in each block of the stacked body. The operation of erasing data can be collectively performed for each block.
However, in this kind of nonvolatile semiconductor memory device, with the increase in the number of control electrode layers, as many extraction lines as the number of control electrode layers are needed. The extraction lines need to be insulated from each other in the same block. As a method for realizing this in the nonvolatile semiconductor memory device, the extraction lines may be spaced from each other. However, with the increase in the number of layers, the block width is inevitably widened.
In this context, a structure can be considered in which a prescribed region of the stacked body is configured as a staircase region with each control electrode shaped like a stair. In this staircase region, an extraction line is connected to each control electrode. As another structure, the staircase region can be configured like a checkerboard. In such structures, the increase of block width is suppressed.
However, the number of stairs of the staircase region still increases with the increase in the number of layers of the stacked body. Thus, there is demand for a new way to suppress the increase of block width with the increase in the number of layers of the stacked body.